Concerning the formation of the passage between the layers of a semiconductor integrated circuit, so called via filling in which the plating is done selectively for the indented part or via on the material to be plated is becoming increasingly important recently. However, when plating is done on the material that has an indented part, it tends to form the plated film on the outer surfaces other than the indented part, and only a thin plated film might be formed in the indented part, or the surface of the indented part becomes closed even though the deposit of plating in the indented part is insufficient so that the plated film that has void spaces tends to be generated, and this is a problem.
Via filling is also used for the case of forming the solder bumps on the electrode terminals of the LSI chip, and the above mentioned problem of via filling has been occurring in bump forming too.
Recently, accompanying the large increase in density and high integration of the semiconductor integrated circuits (LSI) used for electronic equipment, making many pins and a narrow pitch of electrode terminals on LSI chips is rapidly progressing. For bonding these LSI chips onto the circuit substrate, in order to make the small size of electronic parts possible and to make the wiring delay to be less, flip-chip bonding is widely used. In this flip-chip bonding a common way is such that a solder bump is formed on the electrode terminal of the LSI chip, and via the solder bump, it is jointed as a whole to the connecting terminal that is formed on the circuit substrate. As the electrode pitch becomes narrower, the bumps that correspond to this narrow pitch must be formed.
Until now, as methods for forming the bumps, a solder ball is placed on the electrode, or solder paste is applied by a screen print or coating methods have been developed. However, with the solder ball method, the solder ball must be accurately placed on an individual electrode and this is a nuisance. Also, when the electrode pitch becomes narrower, it becomes technically more difficult. Also, with the screen print method the solder paste is printed using a mask, therefore, in the same way it is difficult to accurately form the bump on an individual pad that is configured with the above mentioned narrow pitch. Kokai Patent No. 2000-094179 describes a method in which the solder paste that includes solder powder is coated on the substrate that has the electrode and the solder is melted by heating the substrate, thus the solder bump is formed selectively on the electrode. However, since the paste-like composition is coated on the substrate, localized unevenness in the thickness or concentration occurs, so that differences occur in the amount of solder deposited per electrode or the bumps of uniform height cannot be obtained and this was a problem.
On the other hand, U.S. Pat. No. 7,098,126 describes a method in which a mask layer is placed on the circuit plate that includes at least one contact region, and the pattern formation is done and the pad is exposed, and the metal seed layer is deposited on the entire surface of the substrate by physical vapor deposition, chemical vapor deposition, electroless plating or electroplating, and the resist layer is formed on the metal seed layer, and an opening is formed at a position on the contact pad, and the solder material is deposited at the opening by electroplating, thus via filling is done. The resist and the metal seed layer that is directly under the resist are removed, thus the solder bump is formed on the substrate. However, the Description in U.S. Pat. No. 7,098,126 says that the solder material that is formed at the opening by electroplating is an alloy that contains lead, tin, silver, copper, bismuth, etc., but the method to solve the above mentioned problem of via filling and the composition of the plating liquid are not disclosed at all.
Also, Kokai Patent No. 2012-506628 describes a method in which the substrate has a surface which contains at least one prepared contact region, and the solder mask layer, with which the pattern forming is done, is formed and the contact region is exposed, and the entire substrate region that includes the solder mask layer and the contact region is contacted with a solution that is suitable to provide the conductive layer. Tin or tin alloy electroplating is conducted on the conductive layer and the contact region is via filled. The tin or tin alloy plated layer of the solder mask region and the conductive layer are removed and the solder bump is formed on the substrate. In addition, Kokai Patent No. 2012-506628 discloses a composition as the tin or tin alloy plating liquid, that includes a tin ion source, an acid, an antioxidant, and a leveling agent that can be selected from aromatic aldehydes, aromatic ketones and α/β unsaturated carboxylic acids. However, according to the study done by Inventors, the tin plating liquid that uses an α/β unsaturated carboxylic acid, an α/β unsaturated ester or an α/β unsaturated acid anhydride cannot obtain a sufficient via fill effect (from now on, this will be called the leveling effect) in which the plate is selectively deposited in the indented part. Also, the tin plating liquid that uses an aromatic aldehyde or an aromatic ketone has a problems that burns, dendrites and powder on the formed plated film surface so that a practical and good appearance cannot be obtained and the film characteristics such as soldering ability or color change resistance are poor.